VLSI+ PHOTONIC CTO/COFOUNDER

Absolutely. Here is a professional, recruitment-ready JD for a combined VLSI + Photonic Computing CTO role.

Job Description

Chief Technology Officer — VLSI & Photonic Computing

Job Title: Chief Technology Officer (CTO)

Domain: VLSI, Semiconductor, Silicon Photonics & Photonic Computing

Level: Executive Leadership / C-Suite

Employment: Full-Time

Reports to: Founder / Board of Directors

Location: [Company Location / Hybrid / Remote]

About the Role

We are seeking an exceptional Chief Technology Officer – VLSI & Photonic Computing to lead the development of next-generation computing technologies that combine advanced CMOS/VLSI, semiconductor architecture, silicon photonics, photonic integrated circuits, AI acceleration and advanced packaging.

The CTO will own the technology vision from fundamental device and circuit concepts through processor architecture, RTL, photonic integration, physical design, tape-out, silicon/PIC validation and commercialization.

Key Responsibilities

Technology & Product Strategy

Define the company's long-term semiconductor and photonic computing roadmap.

Establish technology milestones, architecture targets and PPA objectives.

Identify opportunities for disruptive computing architectures.

Evaluate emerging technologies and determine their product relevance.

Develop proprietary technology and intellectual-property strategy.

VLSI & Semiconductor Architecture

Lead development of:

CPU/GPU/NPU and AI accelerator architectures.

ASIC/SoC architectures.

RTL and microarchitecture.

Logic, arithmetic and processing units.

Memory hierarchy and interconnect architecture.

Synthesis, timing closure and physical design.

DFT, DFM and silicon sign-off.

Power, performance, area and thermal optimization.

Photonic Computing

Lead development of:

Photonic processing architectures.

Silicon photonics and photonic integrated circuits.

Optical waveguides, couplers and splitters.

Mach–Zehnder interferometers.

Microring resonators.

Optical modulators and photodetectors.

Photonic logic and arithmetic.

Optical MAC and matrix-computation engines.

High-bandwidth optical interconnects.

Electro-optical and opto-electrical interfaces.

CMOS–Photonic Integration

Develop hybrid architectures combining:

CMOS electronics + photonic computation + optical communication + advanced packaging

Determine which functions are best implemented electronically and which are best implemented optically, with emphasis on overall energy efficiency, latency, bandwidth, scalability and manufacturability.

Advanced Computing

Explore and develop next-generation architectures including:

AI/ML accelerators

Neuromorphic computing

Photonic AI

Optical neural networks

In-memory/near-memory computing

Chiplets

2.5D/3D integration

Co-packaged optics

Advanced semiconductor packaging

R&D Leadership

Build and lead multidisciplinary teams covering:

VLSI/ASIC

Computer architecture

RTL design

Verification

Physical design

DFT

Silicon photonics

Photonic device engineering

PIC design

Analog/mixed-signal

Packaging

Firmware/software

AI/ML algorithms

Silicon validation

Semiconductor Manufacturing

Establish and manage relationships with:

Semiconductor foundries

Silicon-photonics foundries

OSAT/packaging partners

EDA vendors

Semiconductor IP vendors

Photonic IP providers

Research institutions and universities

Own the technology lifecycle:

Concept → Device → Circuit → Architecture → RTL/PIC → Simulation → Verification → Physical Design → Integration → Tape-out → Fabrication → Packaging → Bring-up → Validation → Product

Required Technical Expertise

Essential

Advanced VLSI/CMOS design

Semiconductor device fundamentals

Computer architecture

ASIC/SoC development

RTL/SystemVerilog

Digital logic

Physical design

Verification

Timing/power analysis

Silicon validation

Silicon photonics

Photonic integrated circuits

Optical communication

Photonic device/circuit design

Advanced packaging

Strongly Preferred

CPU/GPU/NPU architecture

AI accelerator architecture

Optical computing

Neuromorphic computing

Chiplet architectures

2.5D/3D integration

Co-packaged optics

Photonic simulation

Semiconductor process technology

Leadership Requirements

The ideal candidate should be able to move seamlessly between:

Physics → Device → Photonic/CMOS Circuit → Logic → Processing Unit → Core → Processor → System → Software

and translate research concepts into manufacturable semiconductor products.

Experience

15+ years of relevant semiconductor/photonics experience preferred.

Proven experience leading semiconductor R&D organizations.

Experience with one or more successful ASIC/SoC/PIC tape-outs.

Experience taking technology from architecture through silicon.

Demonstrated record of technical innovation and patents/IP.

Experience managing external foundry and technology partnerships.

Startup/scale-up experience is highly desirable.

Education

Preferred:

PhD/M.Tech/MS in Electrical Engineering, Electronics, Photonics, Semiconductor Engineering, Computer Engineering, Physics or related field.

Exceptional candidates with significant industry achievements may be considered regardless of academic background.

Key Performance Indicators

The CTO will be measured on:

Processor performance

Performance/Watt

Bandwidth

Latency

Silicon/PIC yield

PPA

Tape-out success

Technology roadmap execution

IP/patent development

Product commercialization

Engineering-team development

R&D execution speed

Core Objective

> Build a new generation of computing systems that intelligently combine electronic and photonic technologies to achieve computing performance, bandwidth and energy efficiency beyond conventional CPU/GPU architectures.

Ideal Candidate

We are looking for a technology visionary, semiconductor architect and engineering leader capable of bridging VLSI, photonics and computer architecture—not merely managing individual engineering teams, but defining the fundamental architecture of the company's next-generation computing platform.