DFT Engineer (3–8 Years Experience)

Job Description:We are looking for skilled Design for Test (DFT) Engineers with 3–8 years of experience to join our growing team. The ideal candidate should have strong expertise in DFT architecture, implementation, and validation for complex SoCs.Key Responsibilities:Develop and implement DFT architectures (Scan, MBIST, LBIST, Boundary Scan)Work on scan insertion, ATPG pattern generation, and fault coverage analysisCollaborate with design and verification teams for testability improvementsPerform DFT verification and debug of test patternsHandle silicon bring-up, debug, and yield improvement activitiesEnsure high-quality test coverage and optimize test timeRequired Skills:Strong hands-on experience in Scan, ATPG, MBIST, LBISTGood knowledge of DFT tools like Tessent / Modus / Encounter TestExperience in JTAG / Boundary Scan (IEEE 1149.1)Understanding of SoC architecture and digital design conceptsScripting knowledge in Perl / Python / TclExperience in debugging silicon issues is a plus