Silicon Custom Circuit Design (Digital or Analog) - Full time

Custom Memory Design

SRAM/custom circuit design and standard cell design

Qualifications

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Candidates must have 7+ years of experience in transistor level custom circuit design from RTL-GDS for CPU and SoC, circuit simulation, equivalence checking, PPA trade off analysis, low power design techniques, timing, noise and power characterization

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Prior experience and proven success of successfully designing high performance SRAM memories, Register file memories, SRAM compilers, data path designs and standard cells

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Experience designing transistor-level custom circuits in advanced FinFET technology nodes

•

Solid understanding of device physics, process technology and circuit design techniques for high performance, low power

•

Experience with advanced process design rules and supervising mask design

•

Knowledge developing automation for compilers and standard cells

•

Post-Silicon test and debug experience

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Ability to work well in a team and be productive under aggressive schedules

•

Excellent problem solving, written and verbal communication

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Master's Degree or Bachelor's Degree with 7+ years of experience

Responsibilities

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The role will be at the center of a state-of-the-art circuit design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly

•

Responsible for designing and delivering custom circuits from scratch

•

Drive design and development of SRAM, register file, custom cells to enable high performance and low power designs

•

Work with microarchitecture team to gather specifications

•

Drive optimal implementation Conduct early sizing estimates and PPA analysis

•

Perform design entry and simulations for optimal design sizing

•

Work closely with mask designers on custom design implementation, DFM and yield enhancement features

•

Collaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing and power closure of the custom design

•

Interact with technology team

•

Participate in developing design and test plans Collaborate with the CAD team and drive design flow enhancements

Job description

Rivos Custom Circuits team is seeking highly motivated candidates to develop state of the art custom SRAM memories, Register file memories, memory compilers and standard cells to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the center of a state-of-the-art circuit design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly.

Responsibilities

Responsible for designing and delivering custom circuits from scratch.

Drive design and development of SRAM, register file, custom cells to enable high performance and low power designsWork with microarchitecture team to gather specifications

Drive optimal implementation Conduct early sizing estimates and PPA analysis. Perform design entry and simulations for optimal design sizingWork closely with mask designers on custom design implementation, DFM and yield enhancement featuresCollaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing and power closure of the custom designInteract with technology team

Participate in developing design and test plans Collaborate with the CAD team and drive design flow enhancements

Qualification

Candidates must have 7+ years of experience in transistor level custom circuit design from RTL-GDS for CPU and SoC, circuit simulation, equivalence checking, PPA trade off analysis, low power design techniques, timing, noise and power characterization.

Prior experience and proven success of successfully designing high performance SRAM memories, Register file memories, SRAM compilers, data path designs and standard cells

Experience designing transistor-level custom circuits in advanced FinFET technology nodes

Solid understanding of device physics, process technology and circuit design techniques for high performance, low power

Experience with advanced process design rules and supervising mask design

Knowledge developing automation for compilers and standard cells

Post-Silicon test and debug experience

Ability to work well in a team and be productive under aggressive schedules.

Excellent problem solving, written and verbal communication

Education and Experience

Master's Degree or Bachelor's Degree with 7+ years of experience