₹3,00,000 – ₹50,00,000 /year
3–20 yrs
Hyderabad, Telangana
Office · Full time
VerilogSystemVerilogUVMOVM
Salary not disclosed
5–10 yrs
Bengaluru, Bangalore, Karnataka
Remote · Full time
Design Verification EngineerIP/SOC VerificationTape-outDebugging
Salary not disclosed
3–10 yrs
All India
Remote · Full time
System VerilogUVMPCIeDDR
Salary not disclosed
4 yrs
Bangalore, Karnataka
Office · Full time
Verification EngineerDesign Verification
Salary not disclosed
5+ yrs
Bengaluru/Bangalore, Karnataka
Office · Full time
Salary not disclosed
10+ yrs
Bengaluru/Bangalore, Karnataka
Office · Full time
Salary not disclosed
8+ yrs
Bengaluru/Bangalore, Karnataka
Office · Full time
Salary not disclosed
5–9 yrs
Bengaluru, Bangalore, Hyderabad, Mysuru, Mysore, Warangal, Karnataka, Telangana
Remote · Full time
ASICSystem on a ChipUniversal Verification MethododlogyFunctional Verification
Salary not disclosed
5–10 yrs
Bengaluru, Bangalore, Karnataka
Remote · Full time
Lead Design Verification EngineerARM SoC VerificationUSB & Low Power Verification
Salary not disclosed
5–9 yrs
Pimpri Chinchwad, Maharashtra
Remote · Full time
Problem SolvingQuality EngineeringComplianceDesign Review